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VLSID
1996
IEEE
110views VLSI» more  VLSID 1996»
13 years 11 months ago
On test coverage of path delay faults
W epropose a coverage metric and a two-pass test generation method for path delay faults in combinational logic circuits. The coverage is measured for each line with a rising and ...
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vi...
DFG
2004
Springer
13 years 11 months ago
Modeling and Formal Verification of Production Automation Systems
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wo...
DOCENG
2008
ACM
13 years 9 months ago
Improving query performance on XML documents: a workload-driven design approach
As XML has emerged as a data representation format and as great quantities of data have been stored in the XML format, XML document design has become an important and evident issu...
Rebeca Schroeder, Ronaldo dos Santos Mello
BMCBI
2006
114views more  BMCBI 2006»
13 years 7 months ago
Epigenetic acquisition of inducibility of type III cytotoxicity in P. aeruginosa
Background: Pseudomonas aeruginosa, an opportunistic pathogen, is often encountered in chronic lung diseases such as cystic fibrosis or chronic obstructive pneumonia, as well as a...
Didier Filopon, Annabelle Mérieau, Gilles B...
IOR
2006
177views more  IOR 2006»
13 years 7 months ago
Combinatorial Benders' Cuts for Mixed-Integer Linear Programming
Mixed-Integer Programs (MIP's) involving logical implications modelled through big-M coefficients, are notoriously among the hardest to solve. In this paper we propose and an...
Gianni Codato, Matteo Fischetti