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ASAP
2006
IEEE
142views Hardware» more  ASAP 2006»
13 years 11 months ago
NoC Hot Spot minimization Using AntNet Dynamic Routing Algorithm
In this paper, a routing model for minimizing hot spots in the network on chip (NOC) is presented. The model makes use of AntNet routing algorithm which is based on Ant colony. Us...
Masoud Daneshtalab, Ashkan Sobhani, Ali Afzali-Kus...
VCIP
2000
13 years 11 months ago
Optimal down-conversion in compressed DCT domain with minimal operations
A new down-conversion scheme in the DCT domain is presented, which can be used in decoders of DCT-compressed images and videos. The down-conversion in the transform domain general...
Myoung-Cheol Shin, In-Cheol Park
JPDC
2008
108views more  JPDC 2008»
13 years 9 months ago
Energy minimization with loop fusion and multi-functional-unit scheduling for multidimensional DSP
Energy saving is becoming one of the major design issues in processor architectures with multiple functional units (FUs). Nested loops are usually the most critical part in multim...
Meikang Qiu, Edwin Hsing-Mean Sha, Meilin Liu, Man...
EDBT
2008
ACM
135views Database» more  EDBT 2008»
14 years 10 months ago
Minimizing latency and memory in DSMS: a unified approach to quasi-optimal scheduling
Data Stream Management Systems (DSMSs) must support optimized execution scheduling of multiple continuous queries on massive, and frequently bursty, data streams. Previous approac...
Yijian Bai, Carlo Zaniolo
FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
14 years 4 months ago
GlitchLess: an active glitch minimization technique for FPGAs
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...