331 search results - page 57 / 67 » Minimizing Energies with Hierarchical Costs |
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...
SMA
1999
ACM
14 years 2 months ago
1999
ACM
We present an efficient algorithm for preserving the total volume of a solids undergoing free-form deformation using discrete level-of-detail representations. Given the boundary r...
3DIM
2007
IEEE
14 years 1 months ago
2007
IEEE
Traditional Shape-from-Shading (SFS) techniques aim to solve an under-constrained problem: estimating depth map from one single image. The results are usually brittle from real im...
DSD
2007
IEEE
14 years 1 months ago
2007
IEEE
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
CVPR
2006
IEEE
14 years 1 months ago
2006
IEEE
Recently proposed Sobolev active contours introduced a new paradigm for minimizing energies defined on curves by changing the traditional cost of perturbing a curve and thereby re...