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CODES
1996
IEEE
13 years 11 months ago
A Model for the Coanalysis of Hardware and Software Architectures
Successful """tiprocessor system design for complex realtime embedded applications requires powerful and comprehensive. yet cost-effective. productive. and maintain...
Fred Rose, Todd Carpenter, Sanjaya Kumar, John Sha...
DAC
2006
ACM
14 years 8 months ago
Optimality study of resource binding with multi-Vdds
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
Deming Chen, Jason Cong, Yiping Fan, Junjuan Xu
AMMA
2009
Springer
14 years 2 months ago
A Market-Based Approach to Multi-factory Scheduling
Abstract. In this paper, we report on the design of a novel market-based approach for decentralised scheduling across multiple factories. Specifically, because of the limitations ...
Perukrishnen Vytelingum, Alex Rogers, Douglas K. M...
ICS
2009
Tsinghua U.
14 years 2 days ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad
ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...