75 search results - page 8 / 15 » Missing the Memory Wall: The Case for Processor Memory Integ... |
CASES
2001
ACM
14 years 6 days ago
2001
ACM
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
HPCA
1998
IEEE
14 years 25 days ago
1998
IEEE
The frequency of accesses to remote data is a key factor affecting the performance of all Distributed Shared Memory (DSM) systems. Remote data caching is one of the most effective...
CASES
2001
ACM
14 years 6 days ago
2001
ACM
Increased systems level integration has meant the movement of many traditionally off chip components onto a single chip including a processor, instruction storage, data path, and ...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...