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ICDCS
1996
IEEE
13 years 11 months ago
The Performance Value of Shared Network Caches in Clustered Multiprocessor Workstations
This paper evaluates the bene t of adding a shared cache to the network interface as a means of improving the performance of networked workstations con gured as a distributed shar...
John K. Bennett, Katherine E. Fletcher, William Ev...
SPAA
2004
ACM
14 years 3 days ago
Effectively sharing a cache among threads
We compare the number of cache misses M1 for running a computation on a single processor with cache size C1 to the total number of misses Mp for the same computation when using p ...
Guy E. Blelloch, Phillip B. Gibbons
CF
2004
ACM
13 years 10 months ago
Reducing traffic generated by conflict misses in caches
Off-chip memory accesses are a major source of power consumption in embedded processors. In order to reduce the amount of traffic between the processor and the off-chip memory as ...
Pepijn J. de Langen, Ben H. H. Juurlink
NAS
2007
IEEE
14 years 29 days ago
An Efficient SAN-Level Caching Method Based on Chunk-Aging
: SAN-level caching can manage caching within a global view so that global hot data can be identified and cached. However, two problems may be encountered in the existing SAN-level...
Jiwu Shu, Yang Wang 0009, Wei Xue, Yifeng Luo
IPPS
2006
IEEE
14 years 21 days ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell