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CF
2009
ACM
14 years 3 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
IEEEPACT
2007
IEEE
14 years 3 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
ATAL
2007
Springer
14 years 3 months ago
A complete distributed constraint optimization method for non-traditional pseudotree arrangements
Distributed Constraint Optimization (DCOP) is a general framework that can model complex problems in multi-agent systems. Several current algorithms that solve general DCOP instan...
James Atlas, Keith Decker
HYBRID
2007
Springer
14 years 3 months ago
Optimal Switches in Multi-inventory Systems
Given a switched multi–inventory system we wish to find the optimal schedule of the resets to maintain the system in a safe operating interval, while minimizing a function relat...
Dario Bauso
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
14 years 3 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...