262 search results - page 9 / 53 » Mnemosyne: Designing and Implementing Network Short-Term Mem... |
ASAP
2006
IEEE
13 years 10 months ago
2006
IEEE
Several semi-parallel decoding architectures have been explored by researchers for the quasi-cyclic low density parity check (LDPC) codes. In these architectures, the reconfigurab...
IPPS
1998
IEEE
14 years 20 days ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
ICIP
2002
IEEE
14 years 10 months ago
2002
IEEE
A new color quantization (CQ) technique and its VLSI implementation is introduced. It is based on image split into windows and uses Kohonen Self Organized Neural Network Classifie...
ANCS
2009
ACM
13 years 6 months ago
2009
ACM
As the Internet grows, both the number of rules in packet filtering databases and the number of prefixes in IP lookup tables inside the router are growing. The packet processing e...
ICANN
2005
Springer
14 years 1 months ago
2005
Springer
Many approaches have emerged in the attempt to explain the memory process. One of which is the Theory of Neuronal Group Selection (TNGS), proposed by Edelman [1]. In the present wo...