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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 3 months ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...
WSC
1998
13 years 11 months ago
Timed Petri Nets as a Verification Tool
This paper presents Timed Petri Nets (TPN) as an analytical approach for verification of computerized queueing network simulation models at steady state. It introduces a generic a...
Miryam Barad
DAGM
2010
Springer
13 years 10 months ago
Geometrically Constrained Level Set Tracking for Automotive Applications
We propose a new approach for integrating geometric scene knowledge into a level-set tracking framework. Our approach is based on a novel constrained-homography transformation mode...
Esther Horbert, Dennis Mitzel, Bastian Leibe
INFOCOM
2008
IEEE
14 years 4 months ago
Approximation Algorithms for Computing Capacity of Wireless Networks with SINR Constraints
—A fundamental problem in wireless networks is to estimate its throughput capacity - given a set of wireless nodes, and a set of connections, what is the maximum rate at which da...
Deepti Chafekar, V. S. Anil Kumar, Madhav V. Marat...
INFOCOM
2009
IEEE
14 years 4 months ago
A Queueing Model Framework of PCE-Based Inter-Area Path Computation
Abstract—Path computation elements (PCE’s) are used to compute end-to-end paths across multiple areas. Multiple PCE’s may be dedicated to each area to provide sufficient path...
Juanjuan Yu, Yue He, Kai Wu, Marco Tacca, Andrea F...