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» Model Checking CTL Properties of Pushdown Systems
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TACAS
2007
Springer
116views Algorithms» more  TACAS 2007»
14 years 1 months ago
Model Checking on Trees with Path Equivalences
For specifying and verifying branching-time requirements, a reactive system is traditionally modeled as a labeled tree, where a path in the tree encodes a possible execution of the...
Rajeev Alur, Pavol Cerný, Swarat Chaudhuri
DAC
2003
ACM
14 years 19 days ago
Dos and don'ts of CTL state coverage estimation
Coverage estimation for model checking quantifies the completeness of a set of properties. We present an improved version of the algorithm of Hoskote et al. [7] that applies to a...
Nikhil Jayakumar, Mitra Purandare, Fabio Somenzi
ATVA
2008
Springer
131views Hardware» more  ATVA 2008»
13 years 9 months ago
Computation Tree Regular Logic for Genetic Regulatory Networks
Model checking has proven to be a useful analysis technique not only for concurrent systems, but also for the genetic regulatory networks (Grns) that govern the functioning of livi...
Radu Mateescu, Pedro T. Monteiro, Estelle Dumas, H...
DLT
2009
13 years 5 months ago
Branching-Time Temporal Logics with Minimal Model Quantifiers
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...
Fabio Mogavero, Aniello Murano
FMCAD
2006
Springer
13 years 11 months ago
Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling
In this paper we present a complete method for verifying properties expressed in the temporal logic CTL. In contrast to the majority of verification methods presented in recent yea...
Florian Pigorsch, Christoph Scholl, Stefan Disch