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FORMATS
2003
Springer
15 years 7 months ago
Performance Analysis of Probabilistic Timed Automata Using Digital Clocks
Probabilistic timed automata, a variant of timed automata extended with discrete probability distributions, is a specification formalism suitable for describing both nondeterminis...
Marta Z. Kwiatkowska, Gethin Norman, David Parker,...
114
Voted
DCC
2010
IEEE
15 years 7 months ago
Tanner Graph Based Image Interpolation
This paper interprets image interpolation as a channel decoding problem and proposes a tanner graph based interpolation framework, which regards each pixel in an image as a variab...
Ruiqin Xiong, Wen Gao
DSN
2000
IEEE
15 years 7 months ago
An Automatic SPIN Validation of a Safety Critical Railway Control System
This paper describes an experiment in formal specification and validation performed in the context of an industrial joint project. The project involved an Italian company working...
Stefania Gnesi, Diego Latella, Gabriele Lenzini, C...
127
Voted
CONCUR
2000
Springer
15 years 7 months ago
Verifying Quantitative Properties of Continuous Probabilistic Timed Automata
Abstract. We consider the problem of automatically verifying realtime systems with continuously distributed random delays. We generalise probabilistic timed automata introduced in ...
Marta Z. Kwiatkowska, Gethin Norman, Roberto Segal...
114
Voted
ATVA
2007
Springer
150views Hardware» more  ATVA 2007»
15 years 6 months ago
3-Valued Circuit SAT for STE with Automatic Refinement
Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3-valued symbolic simulation, using 0,1 and X n"), where t...
Orna Grumberg, Assaf Schuster, Avi Yadgar