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ATVA
2008
Springer
144views Hardware» more  ATVA 2008»
13 years 11 months ago
Tests, Proofs and Refinements
1 : Logic in Specification and Verification (abstract) Natarajan Shankar (SRI) Session Chair : Sungdeok Cha 12 : 00 13 : 00 Lunch 13 : 00 15 : 00 2 : Boolean Modeling of Cell Biolo...
Sriram K. Rajamani
CORR
2008
Springer
89views Education» more  CORR 2008»
13 years 10 months ago
Model Checking Positive Equality-free FO: Boolean Structures and Digraphs of Size Three
We study the model checking problem, for fixed structures A, over positive equality-free first-order logic
Barnaby Martin
DAC
2010
ACM
14 years 1 months ago
Coverage in interpolation-based model checking
Coverage is a means to quantify the quality of a system specification, and is frequently applied to assess progress in system validation. Coverage is a standard measure in testin...
Hana Chockler, Daniel Kroening, Mitra Purandare
FUIN
2010
172views more  FUIN 2010»
13 years 7 months ago
Bounded Parametric Verification for Distributed Time Petri Nets with Discrete-Time Semantics
Bounded Model Checking (BMC) is an efficient technique applicable to verification of temporal properties of (timed) distributed systems. In this paper we show for the first time ho...
Michal Knapik, Wojciech Penczek, Maciej Szreter, A...
FM
2003
Springer
139views Formal Methods» more  FM 2003»
14 years 3 months ago
Combining Real-Time Model-Checking and Fault Tree Analysis
We present a semantics for fault tree analysis, a technique used for the analysis of safety critical systems, in the real-time interval logic Duration Calculus with Liveness and sh...
Andreas Schäfer