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» Model Checking Synchronous Timing Diagrams
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DATE
2008
IEEE
103views Hardware» more  DATE 2008»
14 years 1 months ago
Compositional design of isochronous systems
The synchronous modeling paradigm provides strong execution correctness guarantees to embedded system design while making minimal environmental assumptions. In most related framew...
Jean-Pierre Talpin, Julien Ouy, Loïc Besnard,...
CONCUR
1998
Springer
13 years 11 months ago
Algebraic Techniques for Timed Systems
Performance evaluation is a central issue in the design of complex real-time systems. In this work, we propose an extension of socalled "Max-Plus" algebraic techniques to...
Albert Benveniste, Claude Jard, Stephane Gaubert
TACAS
2001
Springer
135views Algorithms» more  TACAS 2001»
13 years 12 months ago
Implementing a Multi-valued Symbolic Model Checker
Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dyn...
Marsha Chechik, Benet Devereux, Steve M. Easterbro...
FMSD
2007
110views more  FMSD 2007»
13 years 7 months ago
Exploiting interleaving semantics in symbolic state-space generation
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
Gianfranco Ciardo, Gerald Lüttgen, Andrew S. ...
GLOBECOM
2010
IEEE
13 years 5 months ago
Packet-Reliability-Based Decode-and-Forward Distributed Space-Time Shift Keying
Motivated by the recent concept of Space-Time Shift Keying (STSK), we propose a novel cooperative STSK scheme, which is capable of achieving a flexible rate-diversity tradeoff, in ...
Shinya Sugiura, Sheng Chen, Lajos Hanzo