72 search results - page 6 / 15 » Model Checking Synchronous Timing Diagrams |
LFCS
2007
Springer
14 years 1 months ago
2007
Springer
We present a general algorithm scheme for model checking logics of knowledge, common knowledge and linear time, based on simulations to a class of structures that capture the way t...
CONCUR
1999
Springer
13 years 11 months ago
1999
Springer
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
TACAS
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. This paper presents algorithms and data structures that exploit a compositional and hierarchical specification to enable more efficient symbolic modelchecking. We encod...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
SPIN
2000
Springer
13 years 11 months ago
2000
Springer
In this paper, we describe our application of SPIN 1 to model an algorithm used to synchronize the clocks of modules that provide periodic real-time communication over a network. W...