Sciweavers

502 search results - page 18 / 101
» Model Checking Timed Systems with Priorities
Sort
View
KBSE
2005
IEEE
14 years 1 months ago
Learning to verify branching time properties
We present a new model checking algorithm for verifying computation tree logic (CTL) properties. Our technique is based on using language inference to learn the fixpoints necessar...
Abhay Vardhan, Mahesh Viswanathan
RTCSA
1999
IEEE
14 years 4 days ago
Schedulability-Driven Communication Synthesis for Time Triggered Embedded Systems
Abstract. We present an approach to static priority preemptive process scheduling for the synthesis of hard realtime distributed embedded systems where communication plays an impor...
Paul Pop, Petru Eles, Zebo Peng
DAC
2008
ACM
14 years 8 months ago
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In t...
Swarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. R...
HYBRID
2003
Springer
14 years 1 months ago
Model Checking LTL over Controllable Linear Systems Is Decidable
Abstract. The use of algorithmic verification and synthesis tools for hybrid systems is currently limited to systems exhibiting simple continuous dynamics such as timed automata o...
Paulo Tabuada, George J. Pappas
ISSTA
1998
ACM
13 years 11 months ago
Improving Efficiency of Symbolic Model Checking for State-Based System Requirements
We present various techniques for improving the time and space efficiency of symbolic model checking for system requirements specified as synchronous finite state machines. We use...
William Chan, Richard J. Anderson, Paul Beame, Dav...