Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Abstract. Branch-and-Check, introduced ten years ago, is a generalization of logic-based Benders decomposition. The key extension is to solve the Benders sub-problems at each feasi...
Abstract. Unbounded model checking of invariant properties is typically solved using symbolic reachability. However, BDD based reachability methods suffer from lack of robustness ...
Debashis Sahoo, Jawahar Jain, Subramanian K. Iyer,...
Abstract. Architectural description languages are a useful tool for modmplex software systems at a high level of abstraction and, if based on formal methods, for enabling the early...
Abstract. We present a simple method for verifying the safety properties of cache coherence protocols with arbitrarily many nodes. Our presentation begins with two examples. The fi...
Ching-Tsun Chou, Phanindra K. Mannava, Seungjoon P...