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ICSE
2001
IEEE-ACM
14 years 9 days ago
Fast Formal Analysis of Requirements via "Topoi Diagrams"
Early testing of requirements can decrease the cost of removing errors in software projects. However, unless done carefully, that testing process can significantly add to the cos...
Tim Menzies, John D. Powell, Michael E. Houle
VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
13 years 5 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
CHARME
2003
Springer
110views Hardware» more  CHARME 2003»
13 years 11 months ago
Exact and Efficient Verification of Parameterized Cache Coherence Protocols
Abstract. We propose new, tractably (in some cases provably) efficient algorithmic methods for exact (sound and complete) parameterized reasoning about cache coherence protocols. F...
E. Allen Emerson, Vineet Kahlon
ATVA
2006
Springer
162views Hardware» more  ATVA 2006»
13 years 11 months ago
Predicate Abstraction of Programs with Non-linear Computation
e Abstraction of Programs With Non-linear Computation Songtao Xia1 Ben Di Vito2 Cesar Munoz3 1 NASA Postdoc at NASA Langley Research Center, Hampton, VA 2 NASA Langley Research Cen...
Songtao Xia, Ben Di Vito, César Muño...
ACSD
2003
IEEE
103views Hardware» more  ACSD 2003»
14 years 1 months ago
Design Validation of ZCSP with SPIN
— We consider the problem of specifying a model of the Zero Copy Secured Protocol for the purpose of LTL verification with the SPIN Model Checker. ZCSP is based on Direct Memory...
Vincent Beaudenon, Emmanuelle Encrenaz, Jean Lou D...