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SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
14 years 22 days ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel
INFOCOM
2003
IEEE
14 years 23 days ago
Sensor-Centric Quality of Routing in Sensor Networks
Abstract— Standard embeded sensor nework models emphasize energy efficiency and distributed decision-making by considering untethered and unattended sensors. To this we add two ...
Rajgopal Kannan, Sudipta Sarangi, S. Sitharama Iye...
IJCNN
2008
IEEE
14 years 1 months ago
Hybrid learning architecture for unobtrusive infrared tracking support
—The system architecture presented in this paper is designed for helping an aged person to live longer independently in their own home by detecting unusual and potentially hazard...
K. K. Kiran Bhagat, Stefan Wermter, Kevin Burn
ESTIMEDIA
2009
Springer
14 years 2 months ago
System-level MP-SoC design space exploration using tree visualization
— The complexity of today’s embedded systems forces designers to model and simulate systems and their components to explore the wide range of design choices. Such design space ...
Toktam Taghavi, Andy D. Pimentel, Mark Thompson
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 4 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...