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» Model Order Reduction for Nonlinear IC Models
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ICCD
2007
IEEE
157views Hardware» more  ICCD 2007»
14 years 4 months ago
Combining cluster sampling with single pass methods for efficient sampling regimen design
Microarchitectural simulation is orders of magnitude slower than native execution. As more elements are accurately modeled, problems associated with slow simulation are further ex...
Paul D. Bryan, Thomas M. Conte
ICC
2009
IEEE
150views Communications» more  ICC 2009»
14 years 2 months ago
On the Impact of Correlation on Distributed Detection in Wireless Sensor Networks with Relays Deployment
—In this paper, a binary hypothesis distributed detection problem in correlated wireless sensor networks with cooperative relays deployment is considered. In particular, the effe...
Mohammed W. Baidas, Ahmed S. Ibrahim, Karim G. Sed...
ISCAS
2008
IEEE
136views Hardware» more  ISCAS 2008»
14 years 2 months ago
"Green" micro-architecture and circuit co-design for ternary content addressable memory
—In this paper, an energy-efficient and high performance ternary content addressable memory (TCAM) are presented. It employs the concept of “green” microarchitecture and circ...
Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, Wei Hw...
ISPASS
2006
IEEE
14 years 1 months ago
Comparing multinomial and k-means clustering for SimPoint
SimPoint is a technique used to pick what parts of the program’s execution to simulate in order to have a complete picture of execution. SimPoint uses data clustering algorithms...
Greg Hamerly, Erez Perelman, Brad Calder
MTDT
2006
IEEE
154views Hardware» more  MTDT 2006»
14 years 1 months ago
SRAM Cell Current in Low Leakage Design
This paper highlights the cell current characterization of a low leakage 6T SRAM by adjusting the threshold voltages of the transistors in the memory array to reduce the standby p...
Ding-Ming Kwai, Ching-Hua Hsiao, Chung-Ping Kuo, C...