Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
Xiaofang Chen, Steven M. German, Ganesh Gopalakris...
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
The development of a family of applications in a domain can be greatly eased if patterns in the domain are systematically reused. Systematic use of such a pattern can be achieved ...
The importance of an interconnect pattern density model in ASIC design flow for a 90nm technology is presented. It is shown that performing the timing analysis at the worst-case c...
Payman Zarkesh-Ha, S. Lakshminarayann, Ken Doniger...
A novel Hardware Assisted Top-Doc (HAT) component is disclosed. HAT is an optimized content indexing device based on a modified inverted index structure. HAT accommodates patterns...