Sciweavers

1054 search results - page 176 / 211
» Model Transformations in the Model-Based Development of Real...
Sort
View
ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
14 years 2 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu
ICIP
2003
IEEE
14 years 2 months ago
Evolutionary design of context-free attentional operators
A framework for simulating the visual attention system in primates is presented. Each stage of the attentional hierarchy is chosen with consideration for both psychophysics and ma...
Neil D. B. Bruce, M. Ed Jernigan
ICASSP
2011
IEEE
13 years 16 days ago
HMM-based speech synthesiser using the LF-model of the glottal source
A major factor which causes a deterioration in speech quality in HMM-based speech synthesis is the use of a simple delta pulse signal to generate the excitation of voiced speech. ...
João P. Cabral, Steve Renals, Junichi Yamag...
KBSE
2005
IEEE
14 years 2 months ago
Generation of visual editors as eclipse plug-ins
Visual Languages (VLs) play an important role in software system development. Especially when looking at well-defined domains, a broad variety of domain specific visual language...
Karsten Ehrig, Claudia Ermel, Stefan Hänsgen,...
SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
14 years 2 months ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel