288 search results - page 26 / 58 » Model checking SystemC designs using timed automata |
ECBS
2010
IEEE
14 years 2 months ago
2010
IEEE
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall pr...
DBPL
2007
Springer
14 years 4 months ago
2007
Springer
Macro tree transducers (mtt) are an important model that both covers many useful XML transformations and allows decidable exact typechecking. This paper reports our first step tow...
VMCAI
2010
Springer
14 years 4 months ago
2010
Springer
This paper upgrades Regular Linear Temporal Logic (RLTL) with past operators and complementation. RLTL is a temporal logic that extends the expressive power of linear temporal logi...
MEMOCODE
2007
IEEE
14 years 4 months ago
2007
IEEE
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
FPL
2007
Springer
14 years 4 months ago
2007
Springer
Today’s heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware. The design and implementation of thes...