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» Model checking with Boolean Satisfiability
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FMSD
2010
123views more  FMSD 2010»
13 years 6 months ago
Analog property checkers: a DDR2 case study
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
Kevin D. Jones, Victor Konrad, Dejan Nickovic
SPIN
2007
Springer
14 years 1 months ago
SAT-Based Summarization for Boolean Programs
Boolean programs are frequently used to model abstractions of software programs. They have the advantage that reachability properties are decidable, despite the fact that their sta...
Gérard Basler, Daniel Kroening, Georg Weiss...
ISBRA
2010
Springer
13 years 6 months ago
Analysis of Gene Interactions Using Restricted Boolean Networks and Time-Series Data
A popular model for gene regulatory networks is the Boolean network model. In this paper, we propose an algorithm to perform an analysis of gene regulatory interactions using the B...
Carlos H. A. Higa, Vitor H. P. Louzada, Ronaldo Fu...
DAC
2009
ACM
14 years 8 months ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
PDPTA
2000
13 years 8 months ago
Dependable High Performance Computing on a Parallel Sysplex Cluster
In this paper we address the issue of dependable distributed high performance computing in the field of Symbolic Computation. We describe the extension of a middleware infrastructu...
Wolfgang Blochinger, Reinhard Bündgen, Andrea...