134 search results - page 21 / 27 » Model-Checking for Weighted Timed Automata |
FORMATS
2006
Springer
13 years 10 months ago
2006
Springer
Recently, a new approach to the symbolic model checking of timed automata based on a partial order semantics was introduced, which relies on event zones that use vectors of event o...
VMCAI
2010
Springer
14 years 1 months ago
2010
Springer
This paper upgrades Regular Linear Temporal Logic (RLTL) with past operators and complementation. RLTL is a temporal logic that extends the expressive power of linear temporal logi...
DLT
2007
13 years 8 months ago
2007
Visibly Pushdown Automata (VPA) are a special case of pushdown machines where the stack operations are driven by the input. In this paper, we consider VPA with two stacks, namely 2...
FM
2009
Springer
13 years 11 months ago
2009
Springer
We study a clock synchronization protocol for the Chess WSN. First, we model the protocol as a network of timed automata and verify various instances using the Uppaal model checker...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
Abstract. We propose an approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-process behaviors of a system are modeled as a set of driving uni...