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» Model-integrated parallel application synthesis
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MAM
2007
113views more  MAM 2007»
13 years 7 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
14 years 2 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
13 years 9 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
KBSE
2007
IEEE
14 years 1 months ago
Diconic addition of failsafe fault-tolerance
We present a divide-and-conquer method, called DiConic, for automatic addition of failsafe fault-tolerance to distributed programs, where a failsafe program guarantees to meet its...
Ali Ebnenasir
ASAP
2006
IEEE
147views Hardware» more  ASAP 2006»
14 years 1 months ago
The Molen FemtoJava Engine
This paper presents the Molen FemtoJava engine that is extended with concepts taken from the Molen polymorphic processor. This allows for the existing FemtoJava to be augmented wi...
Júlio C. B. de Mattos, Stephan Wong, Luigi ...