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CODES
1999
IEEE
14 years 10 days ago
A unified formal model of ISA and FSMD
In this paper, we develop a formal framework to widen the scope of retargetable compilation. The goal is achieved by the unification of architectural models for both the processor...
Jianwen Zhu, Daniel Gajski
DAC
2007
ACM
14 years 9 months ago
SODA: Sensitivity Based Optimization of Disk Architecture
Storage plays a pivotal role in the performance of many applications. Optimizing disk architectures is a design-time as well as a run-time issue and requires balancing between per...
Yan Zhang, Sudhanva Gurumurthi, Mircea R. Stan
IISWC
2006
IEEE
14 years 2 months ago
Modeling Cache Sharing on Chip Multiprocessor Architectures
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
Pavlos Petoumenos, Georgios Keramidas, Håkan...
VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
14 years 8 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
CHI
2003
ACM
14 years 8 months ago
Simple cognitive modeling in a complex cognitive architecture
Cognitive modeling has evolved into a powerful tool for understanding and predicting user behavior. Higher-level modeling frameworks such as GOMS and its variants facilitate fast ...
Dario D. Salvucci, Frank J. Lee