59 search results - page 11 / 12 » Modeling Cache Effects at the Transaction Level |
MONET
2008
13 years 6 months ago
2008
Cognitive Radio has been proposed as a promising technology to solve today's spectrum scarcity problem by dynamic spectrum access. The MPSoC reconfigurable platform is propose...
IWMM
2009
Springer
14 years 1 months ago
2009
Springer
Good spatial locality alleviates both the latency and bandwidth problem of memory by boosting the effect of prefetching and improving the utilization of cache. However, convention...
TECS
2008
13 years 6 months ago
2008
straction SUDEEP PASRICHA and NIKIL DUTT University of California, Irvine and MOHAMED BEN-ROMDHANE Newport Media Inc. Currently, system-on-chip (SoC) designs are becoming increasin...
IEEEPACT
2003
IEEE
14 years 3 days ago
2003
IEEE
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
CC
2010
Springer
14 years 1 months ago
2010
Springer
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...