356 search results - page 23 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
ASPLOS
1998
ACM
14 years 26 days ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
RTAS
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--Modern computing systems have adopted multicore architectures and multiprocessor systems on chip (MPSoCs) for accommodating the increasing demand on computation power. Ho...
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
The role of the operating system (OS) in managing shared resources such as CPU time, memory, peripherals, and even energy is well motivated and understood [23]. Unfortunately, one...
DATE
2004
IEEE
14 years 10 days ago
2004
IEEE
We present the design exploration of a System-on-Chip architecture dedicated to the implementation of the HIPERLAN/2 communication protocol. The task was accomplished by means of ...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Chip multiprocessors (CMPs) are becoming a popular way of exploiting ever-increasing number of on-chip transistors. At the same time, the location of data on the chip can play a c...