356 search results - page 33 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
TC
2010
13 years 7 months ago
2010
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
TC
2010
13 years 7 months ago
2010
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
ISCA
2007
IEEE
14 years 2 months ago
2007
IEEE
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...
APSCC
2010
IEEE
13 years 6 months ago
2010
IEEE
Middleware for web service orchestration, such as runtime engines for executing business processes, workflows, or web service compositions, can easily become performance bottleneck...
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...