Sciweavers

669 search results - page 102 / 134
» Modeling Dynamic Architectures Using Nets-Within-Nets
Sort
View
ISCA
2007
IEEE
208views Hardware» more  ISCA 2007»
14 years 5 months ago
Core fusion: accommodating software diversity in chip multiprocessors
This paper presents core fusion, a reconfigurable chip multiprocessor (CMP) architecture where groups of fundamentally independent cores can dynamically morph into a larger CPU, ...
Engin Ipek, Meyrem Kirman, Nevin Kirman, Jos&eacut...
ASIAN
2007
Springer
157views Algorithms» more  ASIAN 2007»
14 years 5 months ago
A Logical Framework for Evaluating Network Resilience Against Faults and Attacks
Abstract. We present a logic-based framework to evaluate the resilience of computer networks in the face of incidents, i.e., attacks from malicious intruders as well as random faul...
Elie Bursztein, Jean Goubault-Larrecq
HPDC
2006
IEEE
14 years 4 months ago
Toward Self Organizing Grids
— The potential of truly large scale grids can only be realized with grid architectures and deployment strategies that lower the need for human administrative intervention, and t...
Nael B. Abu-Ghazaleh, Michael J. Lewis
GLVLSI
1997
IEEE
110views VLSI» more  GLVLSI 1997»
14 years 3 months ago
Algorithm and Hardware Support for Branch Anticipation
Multi-dimensional systems containing nested loops are widely used to model scientific applications such as image processing, geophysical signal processing and fluid dynamics. Ho...
Ted Zhihong Yu, Edwin Hsing-Mean Sha, Nelson L. Pa...
ISCA
1993
IEEE
153views Hardware» more  ISCA 1993»
14 years 3 months ago
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
Per Stenström, Mats Brorsson, Lars Sandberg