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IPPS
2006
IEEE
14 years 2 months ago
MegaProto/E: power-aware high-performance cluster with commodity technology
In our research project named “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, we have been developing a prototype cluster not based on ASIC or FPGA...
Taisuke Boku, Mitsuhisa Sato, Daisuke Takahashi, H...
GLVLSI
2003
IEEE
144views VLSI» more  GLVLSI 2003»
14 years 1 months ago
A hybrid adiabatic content addressable memory for ultra low-power applications
This paper presents a hybrid adiabatic content addressable memory (CAM). The CAM uses an adiabatic switching technique to reduce the energy consumption in the match line while kee...
Aiyappan Natarajan, David Jasinski, Wayne Burleson...
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 1 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
ER
1998
Springer
123views Database» more  ER 1998»
14 years 24 days ago
Web Content Delivery to Heterogeneous Mobile Platforms
It is widely acknowledged that information such as web content should be adapted for mobile platforms to account for restrictions in mobile environments. As emerging mobile platfor...
Martin Gaedke, Michael Beigl, Hans-Werner Gellerse...
CODES
2008
IEEE
13 years 10 months ago
Profiling of lossless-compression algorithms for a novel biomedical-implant architecture
In view of a booming market for microelectronic implants, our ongoing research work is focusing on the specification and design of a novel biomedical microprocessor core targeting...
Christos Strydis, Georgi Gaydadjiev