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» Modeling Hard-Disk Power Consumption
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DAC
2005
ACM
13 years 9 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
ISCAS
2002
IEEE
141views Hardware» more  ISCAS 2002»
14 years 12 days ago
Power characterization of digital filters implemented on FPGA
The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nann...
ISLPED
1997
ACM
114views Hardware» more  ISLPED 1997»
13 years 11 months ago
Cycle-accurate macro-models for RT-level power analysis
 In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...
Qinru Qiu, Qing Wu, Massoud Pedram, Chih-Shun Ding
BTW
2009
Springer
240views Database» more  BTW 2009»
13 years 8 months ago
Efficient Adaptive Retrieval and Mining in Large Multimedia Databases
Abstract: Multimedia databases are increasingly common in science, business, entertainment and many other applications. Their size and high dimensionality of features are major cha...
Ira Assent
CARDIS
2004
Springer
149views Hardware» more  CARDIS 2004»
14 years 27 days ago
Differential Power Analysis Model and Some Results
CMOS gates consume different amounts of power whether their output has a falling or a rising edge. Therefore the overall power consumption of a CMOS circuit leaks information about...
Sylvain Guilley, Philippe Hoogvorst, Renaud Pacale...