32 search results - page 3 / 7 » Modeling Multiprocessor Cache Protocol Impact on MPI Perform... |
CODES
2009
IEEE
14 years 1 months ago
2009
IEEE
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
IEEEPACT
2008
IEEE
14 years 3 months ago
2008
IEEE
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
SC
1992
ACM
14 years 18 days ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
ISPASS
2010
IEEE
14 years 3 months ago
2010
IEEE
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...