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» Modeling and Formal Verification of DHCP Using SPIN
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DAC
1996
ACM
13 years 11 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
ICCD
2000
IEEE
119views Hardware» more  ICCD 2000»
13 years 11 months ago
Source-Level Transformations for Improved Formal Verification
A major obstacle to widespread acceptance of formal verification is the difficulty in using the tools effectively. Although learning the basic syntax and operation of a formal ver...
Brian D. Winters, Alan J. Hu
HASE
1999
IEEE
13 years 12 months ago
Model Checking UML Statechart Diagrams Using JACK
Statechart Diagrams provide a graphical notation for describing dynamic aspects of system behaviour within the Unified Modeling Language (UML). In this paper we present a branchin...
Stefania Gnesi, Diego Latella, Mieke Massink
PPOPP
2009
ACM
14 years 8 months ago
Formal verification of practical MPI programs
This paper considers the problem of formal verification of MPI programs operating under a fixed test harness for safety properties without building verification models. In our app...
Anh Vo, Sarvani S. Vakkalanka, Michael Delisi, Gan...
ACSC
2004
IEEE
13 years 11 months ago
Verification of the Futurebus+ Cache Coherence protocol: A case study in model checking
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
Kylie Williams, Robert Esser