458 search results - page 44 / 92 » Modeling and Formal Verification of DHCP Using SPIN |
155
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FORMATS
2007
Springer
15 years 7 months ago
2007
Springer
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
120
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WWW
2005
ACM
16 years 3 months ago
2005
ACM
We present a design for verification approach to developing reliable web services. We focus on composite web services which consist of asynchronously communicating peers. Our goal...
138
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VLSID
2002
IEEE
16 years 3 months ago
2002
IEEE
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
137
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CMSB
2006
Springer
15 years 7 months ago
2006
Springer
Genetic regulatory networks have been modeled as discrete transition systems by many approaches, benefiting from a large number of formal verification algorithms available for the ...
133
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FMCAD
2008
Springer
15 years 4 months ago
2008
Springer
Abstract--This paper presents the verification of an asynchronous arbiter modeled at the circuit level with non-linear ordinary differential equations. We use Brockett's annul...