1031 search results - page 18 / 207 » Modeling and Formal Verification of Production Automation Sy... |
ATVA
2009
Springer
13 years 11 months ago
2009
Springer
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
SIGSOFT
2007
ACM
14 years 8 months ago
2007
ACM
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
SPLC
2008
13 years 9 months ago
2008
In this paper we propose a behavioural model, namely the Generalized Extended Modal Transition Systems, as a basis for the formalization of different notions of variability usuall...
IEE
2008
13 years 7 months ago
2008
1 2 3 In many real component-based systems and patterns of component interaction, there can be identified a stable part (like control component, server, instance handler) and a nu...
CAISE
2006
Springer
13 years 9 months ago
2006
Springer
The EDEMOI project aims to model standards that regulate airport security. It involves the production of a UML model, to support the validation activity, and a formal model for ver...