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DAC
2005
ACM
13 years 10 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
JHSN
2006
267views more  JHSN 2006»
13 years 8 months ago
Client-side access control enforcement using trusted computing and PEI models
It has been recognized for some time that software alone does not provide an adequate foundation for building a high-assurance trusted platform. The emergence of industry-standard ...
Ravi S. Sandhu, Xinwen Zhang, Kumar Ranganathan, M...
TON
2010
127views more  TON 2010»
13 years 2 months ago
Queue Dynamics With Window Flow Control
This paper develops a new model that describes the queueing process of a communication network when data sources use window flow control. The model takes into account the burstines...
Ao Tang, Lachlan L. H. Andrew, Krister Jacobsson, ...
EMSOFT
2004
Springer
14 years 1 months ago
Multiple process execution in cache related preemption delay analysis
Cache prediction for preemptive scheduling is an open issue despite its practical importance. First analysis approaches use simplified models for cache behavior or they assume si...
Jan Staschulat, Rolf Ernst
IV
2003
IEEE
148views Visualization» more  IV 2003»
14 years 1 months ago
Real-Time Expressive Rendering of City Models
City models have become central elements for visually communicating spatial information related to urban areas and have manifold applications. Our real-time orealistic rendering t...
Jürgen Döllner, Maike Walther