Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
This paper studies the quality of service (QoS) provision problem in noncooperative networks where applications or users are selsh and routers implement generalized processor sha...
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...
This paper presents a modification of GLADE —the current GNAT implementation of the Ada 95 Distributed Systems Annex (DSA)— to support the development of distributed applicatio...