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» Modeling and evaluation of hardware software designs
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IPPS
2005
IEEE
14 years 2 months ago
Analysis of Hardware Acceleration in Reconfigurable Embedded Systems
Embedded designers now have the capability of offloading software routines into custom applicationspecific hardware blocks. This paper evaluates a domain-specific design system fo...
Matthew Ouellette, Daniel A. Connors
MICRO
2006
IEEE
74views Hardware» more  MICRO 2006»
14 years 2 months ago
Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware
Although processor design verification consumes ever-increasing resources, many design defects still slip into production silicon. In a few cases, such bugs have caused expensive...
Smruti R. Sarangi, Abhishek Tiwari, Josep Torrella...
WOSP
1998
ACM
14 years 19 days ago
Poems: end-to-end performance design of large parallel adaptive computational systems
The POEMS project is creating an environment for end-to-end performance modeling of complex parallel and distributed systems, spanning the domains of application software, runti...
Ewa Deelman, Aditya Dube, Adolfy Hoisie, Yong Luo,...
MOBISYS
2004
ACM
14 years 8 months ago
Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet
ZebraNet is a mobile, wireless sensor network in which nodes move throughout an environment working to gather and process information about their surroundings [10]. As in many sen...
Ting Liu, Christopher M. Sadler, Pei Zhang, Margar...
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
14 years 1 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...