1082 search results - page 76 / 217 » Modeling and simulation alternatives for the design of netwo... |
IJCNN
2000
IEEE
14 years 13 days ago
2000
IEEE
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
FDL
2006
IEEE
14 years 2 months ago
2006
IEEE
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
We propose the first systematic, sensor-centric approach for quantitative design of sensor network appliances. We demonstrate its use by designing light appliance devices and the ...
SDL
2003
13 years 9 months ago
2003
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
ANSS
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper describes JSIM: the simulation module of the Java Modelling Tools (JMT), an open-source fully-portable Java suite for capacity planning studies. The simulator has been ...