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PLDI
2003
ACM
14 years 29 days ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
MEMOCODE
2006
IEEE
14 years 1 months ago
Latency-insensitive design and central repetitive scheduling
The theory of latency-insensitive design (LID) was recently invented to cope with the time closure problem in otherwise synchronous circuits and programs. The idea is to allow the...
Julien Boucaron, Robert de Simone, Jean-Vivien Mil...
FGCS
1992
103views more  FGCS 1992»
13 years 9 months ago
Parallel Inference Machine PIM
: There have been no major control problems during the first three years of the new Tokaido-Sanyo Shinkansen (bullet train) Programmed Route Control (PRC) computer system. Prior to...
Kazuo Taki
JVCIR
2007
140views more  JVCIR 2007»
13 years 7 months ago
Robust video streaming over wireless LANs using multiple description transcoding and prioritized retransmission
Video transport over wireless Local Area Networks (LANs) usually suffers from signal fading, noise interference, and network congestion, leading to time-varying packet loss rate ...
Chih-Ming Chen, Chia-Wen Lin, Hsiao-Cheng Wei, Yun...
ICMCS
1997
IEEE
142views Multimedia» more  ICMCS 1997»
13 years 12 months ago
A Rate Allocation Policy with MCR/PCR Support and Distributed ABR Implementation Using Explicit Rate Feedback
An important concept in the available bit rate (ABR) service model as defined by the ATM Forum is the minimum cell rate (MCR) guarantee as well as the peak cell rate (PCR) constra...
Yiwei Thomas Hou, Henry H.-Y. Tzeng, Shivendra S. ...