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» Modeling transactional memory workload performance
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ICS
2001
Tsinghua U.
13 years 12 months ago
Cache performance for multimedia applications
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
Nathan T. Slingerland, Alan Jay Smith
IPPS
2006
IEEE
14 years 1 months ago
Parallelization of module network structure learning and performance tuning on SMP
As an extension of Bayesian network, module network is an appropriate model for inferring causal network of a mass of variables from insufficient evidences. However learning such ...
Hongshan Jiang, Chunrong Lai, Wenguang Chen, Yuron...
SIGPLAN
2008
13 years 7 months ago
Single global lock semantics in a weakly atomic STM
As memory transactions have been proposed as a language-level replacement for locks, there is growing need for well-defined semantics. In contrast to database transactions, transa...
Vijay Menon, Steven Balensiefer, Tatiana Shpeisman...
ISPASS
2005
IEEE
14 years 1 months ago
Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste A...
HPCA
2011
IEEE
12 years 11 months ago
Calvin: Deterministic or not? Free will to choose
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
Derek Hower, Polina Dudnik, Mark D. Hill, David A....