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FMCAD
2007
Springer
14 years 28 days ago
A Mechanized Refinement Framework for Analysis of Custom Memories
We present a framework for formal verification of embedded custom memories. Memory verification is complicated ifficulty in abstracting design parameters induced by the inherently ...
Sandip Ray, Jayanta Bhadra
ISCA
2011
IEEE
294views Hardware» more  ISCA 2011»
13 years 22 days ago
Moguls: a model to explore the memory hierarchy for bandwidth improvements
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
Guangyu Sun, Christopher J. Hughes, Changkyu Kim, ...
ICPP
1991
IEEE
14 years 17 days ago
Two Techniques to Enhance the Performance of Memory Consistency Models
The memory consistency model supported by a multiprocessor directly affects its performance. Thus, several attempts have been made to relax the consistency models to allow for mor...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
FMCAD
2008
Springer
13 years 10 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
DAMON
2008
Springer
13 years 10 months ago
Modeling the performance of algorithms on flash memory devices
NAND flash memory is fast becoming popular as a component of large scale storage devices. For workloads requiring many random I/Os, flash devices can provide two orders of magnitu...
Kenneth A. Ross