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RTCSA
1999
IEEE
14 years 2 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 11 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
WMCSA
1999
IEEE
14 years 2 months ago
'Caches in the Air': Disseminating Tourist Information in the Guide System
This paper describes work carried out as part of the GUIDE project at Lancaster University. The overall aim of the project is to develop a context-sensitive tourist guide for visi...
Nigel Davies, Keith Cheverst, Keith Mitchell, Adri...
ESWS
2008
Springer
13 years 11 months ago
Resolving Lexical Ambiguities in Folksonomy Based Search Systems through Common Sense and Personalization
Information on Web2.0, generated by users of web based services, is both difficult to organize and organic in nature. Content categorization and search in such situation offers cha...
Mohammad Nauman, Shahbaz Khan 0003, Muhammad Amin,...
APCSAC
2006
IEEE
14 years 4 months ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...