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ESWA
2011
245views Database» more  ESWA 2011»
14 years 10 months ago
APROMORE: An advanced process model repository
Business process models are becoming available in large numbers due to their popular use in many industrial applications such as enterprise and quality engineering projects. On th...
Marcello La Rosa, Hajo A. Reijers, Wil M. P. van d...
SBACPAD
2007
IEEE
121views Hardware» more  SBACPAD 2007»
15 years 10 months ago
DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
HPCC
2007
Springer
15 years 10 months ago
Parallel Performance Prediction for Multigrid Codes on Distributed Memory Architectures
We propose a model for describing the parallel performance of multigrid software on distributed memory architectures. The goal of the model is to allow reliable predictions to be m...
Giuseppe Romanazzi, Peter K. Jimack
ASAP
2006
IEEE
145views Hardware» more  ASAP 2006»
15 years 10 months ago
2D-VLIW: An Architecture Based on the Geometry of Computation
This work proposes a new architecture and execution model called 2D-VLIW. This architecture adopts an execution model based on large pieces of computation running over a matrix of...
Ricardo Santos, Rodolfo Azevedo, Guido Araujo
DATE
2006
IEEE
119views Hardware» more  DATE 2006»
15 years 10 months ago
Performance evaluation for system-on-chip architectures using trace-based transaction level simulation
The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf