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» Modelling and Evaluating Real-Time Software Architectures
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DAC
2004
ACM
14 years 8 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
PASTE
2005
ACM
14 years 1 months ago
Low overhead program monitoring and profiling
Program instrumentation, inserted either before or during execution, is rapidly becoming a necessary component of many systems. Instrumentation is commonly used to collect informa...
Naveen Kumar, Bruce R. Childers, Mary Lou Soffa
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 1 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
SQJ
2010
152views more  SQJ 2010»
13 years 6 months ago
Design pattern evolutions in QVT
One of the main goals of design patterns is to design for change. Many design patterns leave some room for future changes and evolutions. The application of design patterns leads ...
Jing Dong, Yajing Zhao, Yongtao Sun
CGO
2010
IEEE
14 years 23 hour ago
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs
In this paper we describe techniques for compiling finegrained SPMD-threaded programs, expressed in programming models such as OpenCL or CUDA, to multicore execution platforms. Pr...
John A. Stratton, Vinod Grover, Jaydeep Marathe, B...