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LICS
2010
IEEE
13 years 8 months ago
On the Expressivity of Symmetry in Event Structures
—This paper establishes a bridge between presheaf models for concurrency and the more operationally-informative world of event structures. It concentrates on a particular preshea...
Sam Staton, Glynn Winskel
FOCS
2000
IEEE
14 years 2 months ago
Zaps and Their Applications
A zap is a two-round, public coin witness-indistinguishable protocol in which the first round, consisting of a message from the verifier to the prover, can be fixed “once and...
Cynthia Dwork, Moni Naor
SAMOS
2004
Springer
14 years 3 months ago
Scalable Instruction-Level Parallelism.
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
Chris R. Jesshope
CONCURRENCY
2007
95views more  CONCURRENCY 2007»
13 years 10 months ago
Automated and accurate cache behavior analysis for codes with irregular access patterns
Abstract. The memory hierarchy plays an essential role in the performance of current computers, thus good analysis tools that help predict and understand its behavior are required....
Diego Andrade, Manuel Arenaz, Basilio B. Fraguela,...
IFIP
2004
Springer
14 years 3 months ago
The Driving Philosophers
We introduce a new synchronization problem in mobile ad-hoc systems: the Driving Philosophers. In this problem, an unbounded number of driving philosophers (processes) access a rou...
Sébastien Baehni, Roberto Baldoni, Rachid G...