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ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
14 years 6 months ago
Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation
Modeling and simulating pipelined processors in procedural languages such as C/C++ requires lots of cost in handling concurrent events, which hinders fast simulation. A number of ...
In-Cheol Park, Se-Hyeon Kang, Yongseok Yi
CERA
2002
201views more  CERA 2002»
13 years 9 months ago
CAD-Based Shape Optimization Using a Meshfree Method
: A shape design sensitivity analysis and optimization procedure is proposed using a meshfree method. A CAD tool connection is established to facilitate the seamless integration of...
Iulian Grindeanu, Nam Ho Kim, Kung K. Choi, Jiun-S...
ICAC
2009
IEEE
14 years 4 months ago
Model-driven architectural monitoring and adaptation for autonomic systems
Architectural monitoring and adaptation allows self-management capabilities of autonomic systems to realize more powerful adaptation steps, which observe and adjust not only param...
Thomas Vogel, Stefan Neumann, Stephan Hildebrandt,...
DSD
2007
IEEE
120views Hardware» more  DSD 2007»
14 years 4 months ago
Latency Minimization for Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) are a very useful means for modeling and analyzing streaming applications. Some performance indicators, such as throughput, have been studied b...
Amir Hossein Ghamarian, Sander Stuijk, Twan Basten...
GTTSE
2007
Springer
14 years 4 months ago
Design Space of Heterogeneous Synchronization
Abstract. This tutorial explores the design space of heterogeneous synchronization, which is concerned with establishing consistency among artifacts that conform to different sche...
Michal Antkiewicz, Krzysztof Czarnecki