6229 search results - page 247 / 1246 » Models of Computation for Networks on Chip |
118
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NCA
2008
IEEE
15 years 4 months ago
2008
IEEE
A common statistical model for paired comparisons is the Bradley-Terry model. This research re-parameterizes the Bradley-Terry model as a single-layer artificial neural network (A...
149
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DAC
2011
ACM
14 years 4 months ago
2011
ACM
The Kahn Process Network (KPN) model is a widely used modelof-computation to specify and map streaming applications onto multiprocessor systems-on-chips. In general, KPNs are dif...
143
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CF
2004
ACM
15 years 10 months ago
2004
ACM
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
114
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DAC
1997
ACM
15 years 8 months ago
1997
ACM
CAD tools and research in the area of reduced-order modeling of largelinearinterconnect networkshaveevolved from merely finding a Pad´e approximation for the given network trans...
141
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WWW
2005
ACM
16 years 5 months ago
2005
ACM
Recent developments in the area of neural networks provided new models which are capable of processing general types of graph structures. Neural networks are well-known for their ...