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» Models of Computation for Networks on Chip
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MMB
2010
Springer
194views Communications» more  MMB 2010»
14 years 1 months ago
Searching for Tight Performance Bounds in Feed-Forward Networks
Abstract. Computing tight performance bounds in feed-forward networks under general assumptions about arrival and server models has turned out to be a challenging problem. Recently...
Andreas Kiefer, Nicos Gollan, Jens B. Schmitt
VLSID
2009
IEEE
144views VLSI» more  VLSID 2009»
14 years 9 months ago
Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications
The current paradigm of using Cu interconnects for on-chip global communication is rapidly becoming a serious performance bottleneck in ultra-deep submicron (UDSM) technologies. C...
Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi
FDL
2004
IEEE
14 years 16 days ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
ASAP
2005
IEEE
96views Hardware» more  ASAP 2005»
14 years 2 months ago
On-Chip Lookup Tables for Fast Symmetric-Key Encryption
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
A. Murat Fiskiran, Ruby B. Lee
CF
2009
ACM
14 years 3 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig